MATLAB EMBEDDED IDE LINK 4 - FOR USE WITH ANALOG DEVICES VISUALDSP PLUSPLUS Instrukcja Użytkownika Pobierz pdf (Strona 23)

22 DSP Selection Guide

Benchmarks

Comparing DSPs

Multiprocessing Support

Even with the powerful DSPs available today,

there are times when the DSP task for a given

system does not fit into a single DSP. Examples

of such applications include sonar, radar, med-

ical imaging, audio mixers, etc. In these cases,

the ability to connect multiple DSPs in a sys-

tem without any glue logic greatly simplifies

the implementation.

ADI offers SHARC DSPs with specialized

hardware for glueless multiprocessing.

On-Chip Memory/On-Chip SRAM Size

The amount of on-chip memory available can

greatly impact system performance, cost, size,

power consumption and complexity. Any time

the DSP core accesses external memory, the

performance can suffer. Off-chip memory often

requires the core to wait additional cycles. In

contrast, the DSP core can access on-chip

memory at the same rate as its instruction rate.

The addition of external memory adds extra

components to the system which increases cost,

power consumption, and complexity.

ADI leads the industry in DSP SRAM inte-

gration. ADI processors have on-chip memo-

ries which often eliminate the need for exter-

nal memory in a system. Furthermore, the

memory is configurable for data word size,

code word size and storage size. This allows

designers to tailor the memory to meet the

algorithm requirements.

TDM Mode

TDM (Time Division Multiplexed) mode refers

to time division multiplexing which is a com-

mon mode for transferring serial data. In

telecommunications applications, T1 and E1

lines use TDM. TDM allows multiple serial

devices to send and receive information using

the same physical connection. TDM also allows

communication between multiple DSPs.

All ADI DSPs support TDM mode in the

serial ports.

Zero-Overhead Looping

The code for most DSP routines falls naturally

into a set of nested loops. Without the support

for zero-overhead looping, the DSP core must

spend cycles calculating the loop termination

values, in addition to the cycles used to process

the algorithm’s computations. Without zero-

overhead looping, performance degrades.

ADI offers 16-bit fixed-point and 32-bit

fixed/floating-point DSPs with zero

overhead, nestable looping to save instruc-

tion cycles.

http://www.analog.com/dsp

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 61 62

Komentarze do niniejszej Instrukcji

Brak uwag